Versatile Data Acquisition and Controls for Epics Using Vme-Based Fpgas

This work was supported by the U.S. DOE Contract No DE-AC05-84-ER40150 Abstract Field-Programmable Gate Arrays (FPGAs) have provided Thomas Jefferson National Accelerator Facility (Jefferson Lab) with versatile VME-based data acquisition and control interfaces with minimal development times. FPGAs have been used to interface with VME controllers using standard A16 and A24 address modes. VME vectored-interrupt capability has also been implemented in some applications. FPGA designs have additionally been used to provide control logic for numerous systems by interfacing with Analog to Digital Converters (ADC), Digital to Analog Converters (DAC), various interlocks, and other drive signals. The building blocks of these logic designs can be tailored to the individual needs of each system and provide system operators with read-backs and controls via a VME interface to an EPICS based computer. This versatility allows the system developer to choose components and define operating parameters and options that are not readily available commercially. Jefferson Lab has begun developing standard FPGA libraries that result in quick turn around times and inexpensive designs. There have been approximately twelve VME-based FPGA designs implemented in the RF and Electronic Support (RFES) Group at Jefferson Lab. FPGA logic density and device speed continue to increase which enables many system designs to be incorporated onto one FPGA. FPGA designs can manipulate data quickly due to the small processing overhead associated with a custom design. This coupled with physical performance advances and optimized logic from compiler tools makes FPGAs solutions faster than many microprocessors. The ability to modify and simulate this firmware enables a designer to easily add new enhancements to a system or modify existing parameters, permitting the design to be both flexible and expandable for future applications.